drm/amd/display: send display_count msg so SMU can enter S0i2
authorHersen Wu <hersenxs.wu@amd.com>
Tue, 31 Oct 2017 19:55:15 +0000 (15:55 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 6 Dec 2017 17:47:33 +0000 (12:47 -0500)
commit631aaa0af4be3de8f0184095075650afaa023334
treea359b5fb27349e6f7d41a6ce123099f2c94f3bc8
parent0af4096db9ec6a7b12475bf8d21ee5464722c7a2
drm/amd/display: send display_count msg so SMU can enter S0i2

SMU can future lower voltages in long idle case when all display is off.

If all display output is turned off via DPMS, send display_count = 0
after all output are turned off.

otherwise send display_count msg before turning on display to make sure
SMU exit S0i2 state.  before is not neccessary as we are out of S0i2
when driver execute code, but send message before anyways for correctness.

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc.c
drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h