[AMDGPU] Define 6 dword subregs
authorStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Fri, 22 May 2020 18:04:46 +0000 (11:04 -0700)
committerStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Fri, 22 May 2020 20:53:29 +0000 (13:53 -0700)
commit62fb3fa6d9c007385ce61e1203e6830fa4172bdd
treef73fa9dc677202635ee4d652f0acdc4375f5b19f
parent7510aede627267819d9693381ad6c16dccfa0d17
[AMDGPU] Define 6 dword subregs

This prevents autogeneration of degenerate names for these.

Differential Revision: https://reviews.llvm.org/D80451
llvm/lib/Target/AMDGPU/SIRegisterInfo.td
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir