aarch64: allow ld1/stq in test output [PR102517]

 aarch64: allow ld1/stq in test output [PR102517]

Following the changes to the inline memcpy operations get expanded, we
now generate ld1/st1 using a 128-bit vector register rather than ldp
with Q registers.  The behaviour is equivalent, so relax the tests to
permit either variant.

gcc/testsuite/ChangeLog:

	PR target/102517
	* gcc.target/aarch64/cpymem-q-reg_1.c: Allow ld1 and st1 for the
	memcpy expansion.