drm/amd/display: Fix DTBCLK disable requests and SRC_SEL programming
authorAlvin Lee <Alvin.Lee2@amd.com>
Sat, 19 Nov 2022 16:42:41 +0000 (11:42 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 31 Dec 2022 12:33:03 +0000 (13:33 +0100)
commit62db9242c1ca5177418e1f84732e11c9fe25bb82
tree7430f36b742dcef64a1c9cc7164ee3afb8033d07
parentec7475a20ceb5bb7d434fbf5d2b7efcb6132ebb5
drm/amd/display: Fix DTBCLK disable requests and SRC_SEL programming

[ Upstream commit f6015da7f2410109bd2ccd2e2828f26185aeb81d ]

[Description]
- When transitioning FRL / DP2 is not required, we will always request
  DTBCLK = 0Mhz, but PMFW returns the min freq
- This causes us to make DTBCLK requests every time we call optimize
  after transitioning from FRL to non-FRL
- If DTBCLK is not required, request the min instead (then we only need
  to make 1 extra request at boot time)
- Also when programming PIPE_DTO_SRC_SEL, don't programming for DP
  first, just programming once for the required selection (programming
  DP on an HDMI connection then switching back causes corruption)

Reviewed-by: Dillon Varone <Dillon.Varone@amd.com>
Acked-by: Jasdeep Dhillon <jdhillon@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c