ARM: 7757/1: mm: don't flush icache in switch_mm with hardware broadcasting
authorWill Deacon <will.deacon@arm.com>
Wed, 12 Jun 2013 11:25:56 +0000 (12:25 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 17 Jun 2013 08:27:06 +0000 (09:27 +0100)
commit621a0147d5c921f4cc33636ccd0602ad5d7cbfbc
tree59bbba6a677dc8fa5fc6375ef1f391bad2dd9ed4
parent2874865c1271cc8e8b663804e5de4bc0c36273e1
ARM: 7757/1: mm: don't flush icache in switch_mm with hardware broadcasting

When scheduling an mm on a CPU where it hasn't previously been used, we
flush the icache on that CPU so that any code loaded previously on
a different core can be safely executed.

For cores with hardware broadcasting of cache maintenance operations,
this is clearly unnecessary, since the inner-shareable invalidation in
__sync_icache_dcache will affect all CPUs.

This patch conditionalises the icache flush in switch_mm based on
cache_ops_need_broadcast().

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: Albin Tonnerre <albin.tonnerre@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/include/asm/mmu_context.h