hdmirx: fix phy init err and add debug [1/1]

hdmirx: fix phy init err and add debug [1/1]

PD#172587

Problem:
1.cable clk is not match from clk measure
2.add some debug interface for tl1

Solution:
1.add audio clock source from tmds
2.add audio clock source from mpll
3.low FRQ phy audio clock out is 4xtmds clk
4.add 6G phy setting
5.match clock measure return value hz
6.phy initial enable terminal by input source
7.add channel switch control 0/1
8.last line,mode:4k2k 420 deep color problem
9.dump register, add error cnt for tl1
10.capture emp data into a file
11.modify tmds data align, snps phy disable

Verify:
1.run ptm
2.verify on chip

Change-Id: I9d003748c0df3dfbd25f7ab987449e2097251c58
Signed-off-by: Yong Qin <yong.qin@amlogic.com>