radeonsi: optimize si_emit_prefetch_L2 when it's split
authorMarek Olšák <marek.olsak@amd.com>
Sat, 9 Jan 2021 22:41:17 +0000 (17:41 -0500)
committerMarek Olšák <marek.olsak@amd.com>
Sat, 30 Jan 2021 20:41:23 +0000 (15:41 -0500)
commit6193aab6557f0b6198a6b5dd596a83221498de81
tree7aaea008ddce20d8cd3f4c97cb72a37eeda0e031
parentc28396cf20376e64ea4fb122834b0649579d530a
radeonsi: optimize si_emit_prefetch_L2 when it's split

When using the prefetch with VS_ONLY=true followed by VS_ONLY=false,
we tested the VS_ONLY bits in the mask when executing VS_ONLY=false where
the bits were always 0. It's also useless to clear the prefetch mask when
VS_ONLY=true.

This commit skips those tests by splitting the function properly using
BEFORE_DRAW and AFTER_DRAW template parameters.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8794>
src/gallium/drivers/radeonsi/si_state_draw.cpp