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(parent: 9dc92bb) | patch
[X86][MCA] Add more tests for MULX (PR51495).
authorAndrea Di Biagio <andrea.dibiagio@sony.com>
Wed, 25 Aug 2021 20:24:58 +0000 (21:24 +0100)
committerAndrea Di Biagio <andrea.dibiagio@sony.com>
Wed, 25 Aug 2021 20:28:21 +0000 (21:28 +0100)
commit6181427bb97fccde5e71323aef4524bf9b1376f4
tree54aa6c2c0e591be79010303e4ee6357a0b190e68tree | snapshot
parent9dc92bba6c742216096e33402a1a8aebf5ca48b7commit | diff
[X86][MCA] Add more tests for MULX (PR51495).

llvm-mca still reports a wrong latency for the case where
the two destination registers of MULX are the same.
llvm/test/tools/llvm-mca/X86/Haswell/mulx-lo-reg-use.s [new file with mode: 0644] blob
llvm/test/tools/llvm-mca/X86/Haswell/mulx-same-regs.s [new file with mode: 0644] blob
llvm/test/tools/llvm-mca/X86/SkylakeClient/mulx-lo-reg-use.s [new file with mode: 0644] blob
llvm/test/tools/llvm-mca/X86/SkylakeClient/mulx-same-regs.s [new file with mode: 0644] blob
Domain: System / Toolchain;