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(parent: 9fb1067) | patch
drm/amd/amdgpu: Fix offset for SQ_DEBUG_STS_GLOBAL on gfx10 (v2)
authorTom St Denis <tom.stdenis@amd.com>
Tue, 16 Jun 2020 12:47:04 +0000 (08:47 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 1 Jul 2020 05:59:22 +0000 (01:59 -0400)
commit614c56111cc73f0a828634dcb2eecd2035c2104b
treed37b561ad04770bf62b6c4c575fb3a1af6b8ecactree | snapshot
parent9fb10671011143d15b6b40d6d5fa9c52c57e9d63commit | diff
drm/amd/amdgpu: Fix offset for SQ_DEBUG_STS_GLOBAL on gfx10 (v2)

Despite having different IP offsets the computed address of the register(s)
are the same between gfx7..gfx10.  This patch fixes the offset relative
to the GC block on gfx10.

(v2): SQ_DEBUG_STS_GLOBAL2 is 0x10 higher ...

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h diff | blob | history
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h diff | blob | history
Domain: System / Kernel;