phy: stm32: manage 1v1 and 1v8 supplies at pll activation/deactivation
authorAmelie Delaunay <amelie.delaunay@foss.st.com>
Tue, 5 Jan 2021 09:05:21 +0000 (10:05 +0100)
committerVinod Koul <vkoul@kernel.org>
Wed, 13 Jan 2021 15:10:21 +0000 (20:40 +0530)
commit613a475f0be10930474b5cf67c1c9aaa0c992798
tree23f539b9b2bbed14c9069a2262afbb3d49fbb64b
parent00a9f71760376749e0857b43a8573803b1a075dc
phy: stm32: manage 1v1 and 1v8 supplies at pll activation/deactivation

PLL block requires to be powered with 1v1 and 1v8 supplies to catch
ENABLE signal.
Currently, supplies are managed through phy_ops .power_on/off, and PLL
activation/deactivation is managed through phy_ops .init/exit.
The sequence of phy_ops .power_on/.phy_init, .power_off/.exit is USB
drivers dependent.
To ensure a good behavior of the PLL, supplies have to be managed at PLL
activation/deactivation. That means the supplies need to be put in usbphyc
node and not in phy children nodes.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20210105090525.23164-3-amelie.delaunay@foss.st.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/st/phy-stm32-usbphyc.c