[X86][Costmodel] Load/store i64/f64 Stride=2 VF=2 interleaving costs
authorRoman Lebedev <lebedev.ri@gmail.com>
Fri, 1 Oct 2021 13:53:28 +0000 (16:53 +0300)
committerRoman Lebedev <lebedev.ri@gmail.com>
Fri, 1 Oct 2021 14:48:14 +0000 (17:48 +0300)
commit612e5b05a281b867383f52e457781d1b5ba76c2d
tree0f31df1979ba750cd36bd825b174a6785b641cf1
parentea76cb87ee4022d8663a7c25943478fe3f64e21a
[X86][Costmodel] Load/store i64/f64 Stride=2 VF=2 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/8a1cfGeMn - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: =1.0`
So pick cost of `2`.

For store we have:
https://godbolt.org/z/jMdcM47bx - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: <=2.0`
So pick cost of `2`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110835
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll