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(parent: d182608) | patch
drm/amd/display: update dcn315 clock table read
authorDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Wed, 30 Mar 2022 20:05:50 +0000 (16:05 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 6 Apr 2022 14:20:34 +0000 (10:20 -0400)
commit60f6fe665e854f94486aac6251950d62b1356a48
tree7f6ee9e1db73000444c4949d890fae3ab0873e02tree | snapshot
parentd1826081bb31f1ed5daa1ba5bb7f0daf51afc2a7commit | diff
drm/amd/display: update dcn315 clock table read

[Why & How]
Make dcn315 base its clock table off dcfclk rather than fclk.

This change also adds some sanity checking to make sure an
empty pmfw table does not result in invalid dal clocks.

Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c diff | blob | history
Domain: System / Kernel;