[AArch64]Change printVectorList to print SVE vector range
authorCaroline Concatto <caroline.concatto@arm.com>
Thu, 13 Oct 2022 18:26:14 +0000 (19:26 +0100)
committerCaroline Concatto <caroline.concatto@arm.com>
Fri, 14 Oct 2022 17:59:56 +0000 (18:59 +0100)
commit60e2aad109fc793de831de4a00116a3616e0e543
treea3fdb2bf4d6927d8807b9588306fe6e8cacdad8e
parent13cd184ef7fa9d76deaffb1924521fa914edba5e
[AArch64]Change printVectorList to print SVE vector range

This patch has the prefered disassembly changed for SVE vector list.
For instance, instead of printing this assembly:
  ld4d { z1.d, z2.d, z3.d, z4.d }, p0/z, [x0]
it will print this:
  ld4d { z1.d-z4.d }, p0/z, [x0]

Differential Revision: https://reviews.llvm.org/D135952
27 files changed:
llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
llvm/test/CodeGen/AArch64/sve-intrinsics-ldN-sret-reg+imm-addr-mode.ll
llvm/test/CodeGen/AArch64/sve-intrinsics-ldN-sret-reg+reg-addr-mode.ll
llvm/test/CodeGen/AArch64/sve-intrinsics-stN-reg-imm-addr-mode.ll
llvm/test/CodeGen/AArch64/sve-intrinsics-stN-reg-reg-addr-mode.ll
llvm/test/CodeGen/AArch64/sve-intrinsics-stores.ll
llvm/test/CodeGen/AArch64/sve-ldN.mir
llvm/test/CodeGen/AArch64/sve-stN.mir
llvm/test/MC/AArch64/SVE/ld3b.s
llvm/test/MC/AArch64/SVE/ld3d.s
llvm/test/MC/AArch64/SVE/ld3h.s
llvm/test/MC/AArch64/SVE/ld3w.s
llvm/test/MC/AArch64/SVE/ld4b.s
llvm/test/MC/AArch64/SVE/ld4d.s
llvm/test/MC/AArch64/SVE/ld4h.s
llvm/test/MC/AArch64/SVE/ld4w.s
llvm/test/MC/AArch64/SVE/st3b.s
llvm/test/MC/AArch64/SVE/st3d.s
llvm/test/MC/AArch64/SVE/st3h.s
llvm/test/MC/AArch64/SVE/st3w.s
llvm/test/MC/AArch64/SVE/st4b.s
llvm/test/MC/AArch64/SVE/st4d.s
llvm/test/MC/AArch64/SVE/st4h.s
llvm/test/MC/AArch64/SVE/st4w.s
llvm/test/tools/llvm-mca/AArch64/A64FX/A64FX-sve-instructions.s
llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-sve-instructions.s