[LegalizeTypes] Replace vecreduce_xor/or/and with vecreduce_add/umax/umin if not...
authorBradley Smith <bradley.smith@arm.com>
Wed, 29 Jun 2022 10:26:17 +0000 (10:26 +0000)
committerBradley Smith <bradley.smith@arm.com>
Thu, 7 Jul 2022 09:33:54 +0000 (09:33 +0000)
commit60d6be5dd3f411cfe1b5392cbbd6131d0ade2faa
tree7140dad6b71bd944786bf62e8a76be746de4c712
parent519d7876cbee5a5d3cd40d41525cd45e44fb07a8
[LegalizeTypes] Replace vecreduce_xor/or/and with vecreduce_add/umax/umin if not legal

This is done during type legalization since the target representation of
these nodes may not be valid until after type legalization, and after
type legalization the fact that these are dealing with i1 types may be
lost.

Differential Revision: https://reviews.llvm.org/D128996
llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/reduce-and.ll
llvm/test/CodeGen/AArch64/reduce-or.ll
llvm/test/CodeGen/AArch64/reduce-xor.ll
llvm/test/CodeGen/AArch64/vecreduce-and-legalization.ll
llvm/test/CodeGen/AArch64/vecreduce-umax-legalization.ll