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coresight: etm4x: Handle TRCVIPCSSCTLR accesses
authorSuzuki K Poulose <suzuki.poulose@arm.com>
Fri, 27 Nov 2020 17:52:48 +0000 (10:52 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 27 Nov 2020 19:23:12 +0000 (20:23 +0100)
commit60c519c5d3629c21ba356782434d5b612d312de4
treec22c2e2a0cae36e6fdc646d4a112ddb5120e3fbetree | snapshot
parent6288b4ceca868eac4bf729532f8d845e3ecbed98commit | diff
coresight: etm4x: Handle TRCVIPCSSCTLR accesses

TRCVIPCSSCTLR is not present if the TRCIDR4.NUMPC > 0. Thus we
should only access the register if it is present, preventing
any undesired behavior.

Cc: stable@vger.kernel.org
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20201127175256.1092685-8-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/hwtracing/coresight/coresight-etm4x-core.c diff | blob | history
Domain: System / Kernel;