riscv: dts: starfive: Add initial StarFive JH7110 device tree
authorEmil Renner Berthing <kernel@esmil.dk>
Sat, 1 Apr 2023 11:19:31 +0000 (19:19 +0800)
committerConor Dooley <conor.dooley@microchip.com>
Wed, 5 Apr 2023 14:50:14 +0000 (15:50 +0100)
commit60bf0a39842eb042bbdc4539285c7e524011fc2d
tree7e72e938c3ea09abec0d22f89e4d4bde9e36c260
parent8868caa2a073cdac8a3c28e4e30cf72fe6b44f22
riscv: dts: starfive: Add initial StarFive JH7110 device tree

Add initial device tree for the JH7110 RISC-V SoC by StarFive
Technology Ltd.

Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Co-developed-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Co-developed-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
[conor: squashed in the removal of the S7's non-existent mmu]
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/starfive/jh7110.dtsi [new file with mode: 0644]