MIPS: Loongson: Merge load addresses
author谢致邦 (XIE Zhibang) <Yeking@Red54.com>
Wed, 4 Jan 2017 13:30:58 +0000 (21:30 +0800)
committerPaul Burton <paul.burton@mips.com>
Tue, 31 Jul 2018 01:59:01 +0000 (18:59 -0700)
commit60bc84e227d24fdb1ac2211c574a88ecd7c836a0
tree22a4bace0305a2901f87130100cbe923ee484b37
parent968dc5a0eaca707f8eb2fbad57d9fbbf3284541e
MIPS: Loongson: Merge load addresses

Systems based upon the Loongson 1B & 1C CPUs share the same load
address, as do those based upon Loongson 1A. Unify the definition of
this load address to reduce duplication & avoid the need for an extra
Loongson 1A case in future.

[paul.burton@mips.com: Rewrite commit message.]

Signed-off-by: 谢致邦 (XIE Zhibang) <Yeking@Red54.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/14927/
Cc: linux-mips@linux-mips.org
arch/mips/loongson32/Platform