drm/msm/dpu: don't clear IRQ register twice
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Thu, 17 Jun 2021 22:20:24 +0000 (01:20 +0300)
committerRob Clark <robdclark@chromium.org>
Fri, 15 Oct 2021 19:59:19 +0000 (12:59 -0700)
commit6087623e7c904de4c8ff48f78dc70cc05ddb8e40
tree0d1f3f15975f8a37000b9b696d5bd608a5649b5f
parenta73033619ea90405895b4fca6af8033dbdaa64bf
drm/msm/dpu: don't clear IRQ register twice

We already clear the IRQ status register before processing IRQs, so do
not clear the register again. Especially do not clear the IRQ status
_after_ processing the IRQ as this way we can loose the event.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Link: https://lore.kernel.org/r/20210617222029.463045-3-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c