[PowerPC]Add Vector Insert Instruction Definitions and MC Test
authorAmy Kwan <amy.kwan1@ibm.com>
Thu, 2 Jul 2020 20:15:14 +0000 (15:15 -0500)
committerLei Huang <lei@ca.ibm.com>
Thu, 2 Jul 2020 20:49:16 +0000 (15:49 -0500)
commit6076fc698df4adb62b2496dcd5f84e778ddc60af
tree4d34b94b6717ffeef2741cfbc4ca05a5dc9e2a79
parent912cd8a37f4628f63c2aec71c772f8935f70d0a8
[PowerPC]Add Vector Insert Instruction Definitions and MC Test

Adds td definitions and asm/disasm tests for the following instructions:

  VINSBVLX
  VINSBVRX
  VINSHVLX
  VINSHVRX
  VINSWVLX
  VINSWVRX
  VINSBLX
  VINSBRX
  VINSHLX
  VINSHRX
  VINSWLX
  VINSWRX
  VINSDLX
  VINSDRX
  VINSW
  VINSD

Differential Revision: https://reviews.llvm.org/D83052
llvm/lib/Target/PowerPC/PPCInstrPrefix.td
llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ISA31.txt
llvm/test/MC/PowerPC/ppc64-encoding-ISA31.s