aarch64: Use RTL builtins for FP ml[as]_n intrinsics
authorJonathan Wright <jonathan.wright@arm.com>
Mon, 18 Jan 2021 12:42:52 +0000 (12:42 +0000)
committerJonathan Wright <jonathan.wright@arm.com>
Fri, 30 Apr 2021 17:40:37 +0000 (18:40 +0100)
commit60518e6473248b16db9125504da0351707c35d1a
tree35242796fa056caf35a8e1ab3fc40c3caa968a6f
parentf546e0d3d0316aa76a45de1f548591bde7308c41
aarch64: Use RTL builtins for FP ml[as]_n intrinsics

Rewrite floating-point vml[as][q]_n Neon intrinsics to use RTL
builtins rather than inline assembly code, allowing for better
scheduling and optimization.

gcc/ChangeLog:

2021-01-18  Jonathan Wright  <jonathan.wright@arm.com>

* config/aarch64/aarch64-simd-builtins.def: Add
float_ml[as]_n_builtin generator macros.
* config/aarch64/aarch64-simd.md (*aarch64_mul3_elt_from_dup<mode>):
Rename to...
(mul_n<mode>3): This, and re-order arguments.
(aarch64_float_mla_n<mode>): Define.
(aarch64_float_mls_n<mode>): Define.
* config/aarch64/arm_neon.h (vmla_n_f32): Use RTL builtin
instead of inline asm.
(vmlaq_n_f32): Likewise.
(vmls_n_f32): Likewise.
(vmlsq_n_f32): Likewise.
gcc/config/aarch64/aarch64-simd-builtins.def
gcc/config/aarch64/aarch64-simd.md
gcc/config/aarch64/arm_neon.h