projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 5976583) | patch
[AArch64][SVE] Asm: Extend EnforceVectorSubVectorTypeIs to distinguish Scalable Vectors
authorFlorian Hahn <florian.hahn@arm.com>
Tue, 7 Nov 2017 10:43:56 +0000 (10:43 +0000)
committerFlorian Hahn <florian.hahn@arm.com>
Tue, 7 Nov 2017 10:43:56 +0000 (10:43 +0000)
commit603c6455d2ffbff096acb5f2902e3212885ef379
tree215127d56ee707dd3313ebf6c75d12c0c6f36d04tree | snapshot
parent5976583a30cb39ccbad277cea1485c0a8c8e417ccommit | diff
[AArch64][SVE] Asm: Extend EnforceVectorSubVectorTypeIs to distinguish Scalable Vectors

Patch [1/5] in a series to add assembler/disassembler support for AArch64 SVE
unpredicated ADD/SUB instructions.

Patch by Sander De Smalen.

Reviewed by: rengolin

Differential Revision: https://reviews.llvm.org/D39087

llvm-svn: 317564
llvm/utils/TableGen/CodeGenDAGPatterns.cpp diff | blob | history
Domain: System / Toolchain;