arm64: Add MIDR encoding for HiSilicon Taishan CPUs
authorHanjun Guo <hanjun.guo@linaro.org>
Tue, 5 Mar 2019 13:40:57 +0000 (21:40 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 6 Nov 2019 12:05:33 +0000 (13:05 +0100)
commit6021dd86ca3825dc11399fe8bb17078848765367
tree4da62fc6d43a075248f5d82084e4681a4fd76bd7
parent9190141529fb1ecd5f88a0ba5179101d47069e5d
arm64: Add MIDR encoding for HiSilicon Taishan CPUs

commit efd00c722ca855745fcc35a7e6675b5a782a3fc8 upstream.

Adding the MIDR encodings for HiSilicon Taishan v110 CPUs,
which is used in Kunpeng ARM64 server SoCs. TSV110 is the
abbreviation of Taishan v110.

Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
Reviewed-by: John Garry <john.garry@huawei.com>
Reviewed-by: Zhangshaokun <zhangshaokun@hisilicon.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm64/include/asm/cputype.h