[AMDGPU] Narrow lshl from 64 to 32 bit if possible
authorStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Mon, 22 May 2017 16:58:10 +0000 (16:58 +0000)
committerStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Mon, 22 May 2017 16:58:10 +0000 (16:58 +0000)
commit5fa289f0d8ff85b9e14d2f814a90761378ab54ae
treefed99a180eebde775b59f959727b7b5934508512
parent80cb549c2fb973ffa84276b6144e0aa65ef690c9
[AMDGPU] Narrow lshl from 64 to 32 bit if possible

Turn expensive 64 bit shift into 32 bit if shift does not overflow int:
shl (ext x) => zext (shl x)

Differential Revision: https://reviews.llvm.org/D33367

llvm-svn: 303569
14 files changed:
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
llvm/test/CodeGen/AMDGPU/add.i16.ll
llvm/test/CodeGen/AMDGPU/add.v2i16.ll
llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
llvm/test/CodeGen/AMDGPU/ctlz.ll
llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
llvm/test/CodeGen/AMDGPU/ds_write2.ll
llvm/test/CodeGen/AMDGPU/fmed3.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll [new file with mode: 0644]
llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
llvm/test/CodeGen/AMDGPU/srl.ll
llvm/test/CodeGen/AMDGPU/sub.i16.ll