drm/i915: Fix ICL MG PHY vswing handling
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 7 Dec 2020 20:35:11 +0000 (22:35 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 21 Jan 2021 19:23:13 +0000 (21:23 +0200)
commit5ec346476e795089b7dac8ab9dcee30c8d80ad84
tree3260688ff7289e503276f227b838d61ef977949f
parenta089301d8dbf738e716e444f02f93a63e181b47d
drm/i915: Fix ICL MG PHY vswing handling

The MH PHY vswing table does have all the entries these days. Get
rid of the old hacks in the code which claim otherwise.

This hack was totally bogus anyway. The correct way to handle the
lack of those two entries would have been to declare our max
vswing and pre-emph to both be level 2.

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Fixes: 9f7ffa297978 ("drm/i915/tc/icl: Update TC vswing tables")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201207203512.1718-1-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
drivers/gpu/drm/i915/display/intel_ddi.c