RISC-V: Cache SBI vendor values
authorHeiko Stuebner <heiko@sntech.de>
Tue, 11 Oct 2022 23:18:40 +0000 (01:18 +0200)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 27 Oct 2022 21:35:11 +0000 (14:35 -0700)
commit5e9c68ea777594a2d63fa44c0509782e90821707
tree239f36c3da14385723ac222275350fa2ed7329a5
parent9abf2313adc1ca1b6180c508c25f22f9395cc780
RISC-V: Cache SBI vendor values

sbi_get_mvendorid(), sbi_get_marchid() and sbi_get_mimpid() might get
called multiple times, though the values of these CSRs should not change
during the runtime of a specific machine.

Though the values can be different depending on which hart of the system
they get called. So hook into the newly introduced cpuinfo struct to allow
retrieving these cached values via new functions.

Also use arch_initcall for the cpuinfo setup instead, as that now clearly
is "architecture specific initialization" and also makes these information
available slightly earlier.

[caching vendor ids]

Suggested-by: Atish Patra <atishp@atishpatra.org>
[using cpuinfo struct as cache]
Suggested-by: Anup Patel <apatel@ventanamicro.com>
Link: https://lore.kernel.org/all/20221011231841.2951264-2-heiko@sntech.de/
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/sbi.h
arch/riscv/kernel/cpu.c