[PowerPC] Implement intrinsic for DARN instruction
authorQiu Chaofan <qiucofan@cn.ibm.com>
Tue, 8 Dec 2020 06:08:52 +0000 (14:08 +0800)
committerQiu Chaofan <qiucofan@cn.ibm.com>
Tue, 8 Dec 2020 06:08:52 +0000 (14:08 +0800)
commit5e85a2ba1645c3edbf26bba096631fbd318ada47
treebf53bf31961c8cc1ae1ddefeeef37e885a562e24
parentf4f81031152b7554185a259abc98932add6b484b
[PowerPC] Implement intrinsic for DARN instruction

Instruction darn was introduced in ISA 3.0. It means 'Deliver A Random
Number'. The immediate number L means:

- L=0, the number is 32-bit (higher 32-bits are all-zero)
- L=1, the number is 'conditioned' (processed by hardware to reduce bias)
- L=2, the number is not conditioned, directly from noise source

GCC implements them in three separate intrinsics: __builtin_darn,
__builtin_darn_32 and __builtin_darn_raw. This patch implements the
same intrinsics. And this change also addresses Bugzilla PR39800.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D92465
clang/include/clang/Basic/BuiltinsPPC.def
clang/test/CodeGen/builtins-ppc.c
llvm/include/llvm/IR/IntrinsicsPowerPC.td
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
llvm/test/CodeGen/PowerPC/builtins-ppc-p9-darn.ll [new file with mode: 0644]