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[XCOFF][AIX] Peephole optimization for toc-data.
authorSean Fertile <sd.fertile@gmail.com>
Thu, 13 Jul 2023 19:12:15 +0000 (15:12 -0400)
committerSean Fertile <sd.fertile@gmail.com>
Fri, 14 Jul 2023 00:40:09 +0000 (20:40 -0400)
commit5e28d30f1fb10faf2db2f8bf0502e7fd72e6ac2e
tree6981624827ba6d3691aeb539a4b5ed61f84fc876tree | snapshot
parentddd18d02c71be4b683a2f9440c7c0d9c4ca4abe8commit | diff
[XCOFF][AIX] Peephole optimization for toc-data.

Followup to D101178 - peephole optimization that converts a
load address instruction and a consuming load/store into just the
load/store when its safe to do so.

eg: converts the 2 instruction code sequence
  la 4, i[TD](2)
  stw 3, 0(4)
to
  stw 3, i[TD](2)

Differential Revision: https://reviews.llvm.org/D101470
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp diff | blob | history
llvm/lib/Target/PowerPC/PPCMCInstLower.cpp diff | blob | history
llvm/test/CodeGen/PowerPC/toc-data-const.ll diff | blob | history
llvm/test/CodeGen/PowerPC/toc-data-peephole-aligment.ll [new file with mode: 0644] blob
llvm/test/CodeGen/PowerPC/toc-data.ll diff | blob | history
Domain: System / Toolchain;