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AMDGPU: Move v_readlane lane select from VGPR to SGPR
authorNicolai Haehnle <nhaehnle@gmail.com>
Mon, 24 Apr 2017 17:17:36 +0000 (17:17 +0000)
committerNicolai Haehnle <nhaehnle@gmail.com>
Mon, 24 Apr 2017 17:17:36 +0000 (17:17 +0000)
commit5dea6451389b97186760db15c3b1c3fc033d5ad1
tree7ac128d1e56961604bfeff7204b86bf63d967728tree | snapshot
parenta266923d5749d98464d662ba23149eb082eb01dfcommit | diff
AMDGPU: Move v_readlane lane select from VGPR to SGPR

Summary:
Fix a compiler bug when the lane select happens to end up in a VGPR.

Clarify the semantic of the corresponding intrinsic to be that of
the corresponding GLSL: the lane select must be uniform across a
wave front, otherwise results are undefined.

Reviewers: arsenm

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D32343

llvm-svn: 301197
llvm/include/llvm/IR/IntrinsicsAMDGPU.td diff | blob | history
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp diff | blob | history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll diff | blob | history
Domain: System / Toolchain;