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(parent: 4910197) | patch
dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
authorEmil Renner Berthing <kernel@esmil.dk>
Sun, 24 Jul 2022 19:03:29 +0000 (21:03 +0200)
committerJaehoon Chung <jh80.chung@samsung.com>
Mon, 24 Jul 2023 23:24:31 +0000 (08:24 +0900)
commit5ddf0b7b7cf465085234c5a9a0a6f7b4897f7f3a
treed8338f813800acbf11799715cf468174c4ba06f6tree | snapshot
parent4910197a93183b04b6e7041ea343fafeffa544abcommit | diff
dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator

Add bindings for the always-on clock and reset generator (AONCRG) on the
JH7110 RISC-V SoC by StarFive Ltd.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml [new file with mode: 0644] blob
include/dt-bindings/clock/starfive,jh7110-crg.h diff | blob | history
include/dt-bindings/reset/starfive,jh7110-crg.h diff | blob | history
Domain: System / Kernel;