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(parent: 6c05648) | patch
clk: renesas: r9a07g043: Add WDT clock and reset entries
authorBiju Das <biju.das.jz@bp.renesas.com>
Mon, 25 Apr 2022 09:52:44 +0000 (10:52 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 28 Apr 2022 14:37:45 +0000 (16:37 +0200)
commit5d33481f54758eb050473af0692a043c084ad581
treeee67a62497d12e0678c87cb2921975ac597d71f2tree | snapshot
parent6c05648b57aba4c677eaf9c6c4c10bf4e713c1c0commit | diff
clk: renesas: r9a07g043: Add WDT clock and reset entries

Add WDT{0,2} clock and reset entries to CPG driver.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220425095244.156720-7-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a07g043-cpg.c diff | blob | history
Domain: System / Kernel;