drm/amd/display: Fix CP_IRQ clear bit and logic
authorHarmanprit Tatla <harmanprit.tatla@amd.com>
Thu, 20 Aug 2020 19:52:18 +0000 (15:52 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Sep 2020 21:52:40 +0000 (17:52 -0400)
commit5cd04c4846a3f910fc8a7150cae81542a0ab32d3
tree0330a03c06ee20b3033b9a7c272e515558e5219b
parent05e3d830fac89af58b9b6a78e5a498f2984cd2cf
drm/amd/display: Fix CP_IRQ clear bit and logic

[Why]
Currently clearing the wrong bit for CP_IRQ, and logic on when to
clear needs to be fixed.

[How]
Corrected bit to clear and improved logic for decision to clear.

Signed-off-by: Harmanprit Tatla <harmanprit.tatla@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c