[AVX-512] Add support for lowering shuffles to VALIGND/VALIGNQ
authorCraig Topper <craig.topper@gmail.com>
Sat, 12 Nov 2016 05:05:27 +0000 (05:05 +0000)
committerCraig Topper <craig.topper@gmail.com>
Sat, 12 Nov 2016 05:05:27 +0000 (05:05 +0000)
commit5cb13062d27719879a6a58f18f458976df0ef102
tree27ece8a59c9beacdf2db9330a58c1f6bd2207c8e
parentc557191b210650b1726d64d67a8b824b4d47cd5f
[AVX-512] Add support for lowering shuffles to VALIGND/VALIGNQ

Summary: VALIGND and VALIGNQ are similar to PALIGNR but instead of working on a 128-bit lane they work on the entire vector register. This change leverages the shuffle rotate detection code used for PALIGNR to detect these cases.

Reviewers: delena, RKSimon

Subscribers: Farhana, llvm-commits

Differential Revision: https://reviews.llvm.org/D26297

llvm-svn: 286709
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll
llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll