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(parent: f33a8f8) | patch
i965/vec4: Assert that ATTR regions are register-aligned.
authorFrancisco Jerez <currojerez@riseup.net>
Fri, 2 Sep 2016 05:39:00 +0000 (22:39 -0700)
committerFrancisco Jerez <currojerez@riseup.net>
Wed, 14 Sep 2016 21:50:59 +0000 (14:50 -0700)
commit5ca35c63673dad28854c00ce34ec6f085ba4ec5e
tree085a0f67b488e8d1632a852a773e02bb036b949atree | snapshot
parentf33a8f8fcfb6ce3baa8813b32d5eff20506f3df1commit | diff
i965/vec4: Assert that ATTR regions are register-aligned.

It might be useful to actually handle this once copy propagation
becomes smarter about register-misaligned offsets.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
src/mesa/drivers/dri/i965/brw_vec4.cpp diff | blob | history
Domain: Graphics System / GL;