KVM: arm64: Don't set HCR_EL2.TVM when S2FWB is supported
authorChristoffer Dall <christoffer.dall@arm.com>
Mon, 28 Oct 2019 13:05:41 +0000 (14:05 +0100)
committerMarc Zyngier <maz@kernel.org>
Mon, 28 Oct 2019 16:20:58 +0000 (16:20 +0000)
commit5c401308017f256ae9de804b4a1c65be1d390571
tree20e06043ff6fb0d424835302132510475ddd66db
parent01d035d796fec0ab23dc3f3a3a9f58bbe034fc5b
KVM: arm64: Don't set HCR_EL2.TVM when S2FWB is supported

On CPUs that support S2FWB (Armv8.4+), KVM configures the stage 2 page
tables to override the memory attributes of memory accesses, regardless
of the stage 1 page table configurations, and also when the stage 1 MMU
is turned off.  This results in all memory accesses to RAM being
cacheable, including during early boot of the guest.

On CPUs without this feature, memory accesses were non-cacheable during
boot until the guest turned on the stage 1 MMU, and we had to detect
when the guest turned on the MMU, such that we could invalidate all cache
entries and ensure a consistent view of memory with the MMU turned on.
When the guest turned on the caches, we would call stage2_flush_vm()
from kvm_toggle_cache().

However, stage2_flush_vm() walks all the stage 2 tables, and calls
__kvm_flush-dcache_pte, which on a system with S2FWB does ... absolutely
nothing.

We can avoid that whole song and dance, and simply not set TVM when
creating a VM on a system that has S2FWB.

Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20191028130541.30536-1-christoffer.dall@arm.com
arch/arm64/include/asm/kvm_arm.h
arch/arm64/include/asm/kvm_emulate.h