[X86][SSE] Add support for (V)PMOVSX* constant folding
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 25 Oct 2016 14:29:25 +0000 (14:29 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 25 Oct 2016 14:29:25 +0000 (14:29 +0000)
commit5c3c9707c32923e5acae0f7d2253e60da4e89096
treeb1c57c68844b4da1de54e560bf8384bef25e0cc1
parent426e6f71f80b52f0e46fdf28add25525b30e657c
[X86][SSE] Add support for (V)PMOVSX* constant folding

We already have (V)PMOVZX* combining support, this is the beginning of handling (V)PMOVSX* similarly - other combines in combineVSZext can be generalized in future patches.

This unearthed an interesting bug in that we were generating illegal build vectors on 32-bit targets - it was proving difficult to create a test for it from PMOVZX, but it fired immediately with PMOVSX. I've created a more general form of the existing getConstVector to handle these cases - ideally this should be handled in non-target-specific code but I couldn't find an equivalent.

Differential Revision: https://reviews.llvm.org/D25874

llvm-svn: 285072
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/fold-vector-sext-zext.ll
llvm/test/CodeGen/X86/pmul.ll
llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll
llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll
llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll