drm/bridge: ti-sn65dsi86: Implement lane reordering + polarity
authorDouglas Anderson <dianders@chromium.org>
Mon, 18 May 2020 18:47:17 +0000 (11:47 -0700)
committerSam Ravnborg <sam@ravnborg.org>
Mon, 18 May 2020 19:37:02 +0000 (21:37 +0200)
commit5bebaeadb30e8d1ed694bd9b63d4e424d333fe36
tree22a7baf5389c253675575abab07747238901651a
parentfe3d7a35497c807d0dad0642afd87d6ba5b6fc86
drm/bridge: ti-sn65dsi86: Implement lane reordering + polarity

The ti-sn65dsi86 MIPI DSI to eDP bridge chip supports arbitrary
remapping of eDP lanes and also polarity inversion.  Both of these
features have been described in the device tree bindings for the
device since the beginning but were never implemented in the driver.
Implement both of them.

Part of this change also allows you to (via the same device tree
bindings) specify to use fewer than the max number of DP lanes that
the panel reports.  This could be useful if your display supports more
lanes but only a few are hooked up on your board.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200518114656.REPOST.v2.1.Ibc8eeddcee94984a608d6900b46f9ffde4045da4@changeid
drivers/gpu/drm/bridge/ti-sn65dsi86.c