[X86][SSE] Use ISD::MULHS for constant vXi16 ISD::SRA lowering (PR38151)

[X86][SSE] Use ISD::MULHS for constant vXi16 ISD::SRA lowering (PR38151)

Similar to the existing ISD::SRL constant vector shifts from D49562, this patch adds ISD::SRA support with ISD::MULHS.

As we're dealing with signed values, we have to handle shift by zero and shift by one special cases, so XOP+AVX2/AVX512 splitting/extension is still a better solution - really we should still use ISD::MULHS if one of the special cases are used but for now I've just left a TODO and filtered by isKnownNeverZero.

Differential Revision: https://reviews.llvm.org/D52171

llvm-svn: 343093