phy: ti: gmii-sel: Add support for CPSW9G GMII SEL in J721e
authorSiddharth Vadapalli <s-vadapalli@ti.com>
Wed, 26 Oct 2022 07:45:32 +0000 (13:15 +0530)
committerVinod Koul <vkoul@kernel.org>
Mon, 7 Nov 2022 04:50:25 +0000 (10:20 +0530)
commit5bd78c00d753d4e80e151555565334c475a559d3
treeec8e0f81d5e301afee858a49a0664532206b2094
parent3b66ab69c566e79d58cc38bd7c90a6b2b0b84a7d
phy: ti: gmii-sel: Add support for CPSW9G GMII SEL in J721e

Each of the CPSW9G ports in J721e support additional modes like QSGMII.
Add a new compatible for J721e to support the additional modes.

In TI's J721e, each of the CPSW9G ethernet interfaces can act as a
QSGMII main or QSGMII-SUB port. The QSGMII main interface is responsible
for performing auto-negotiation between the MAC and the PHY while the rest
of the interfaces are designated as QSGMII-SUB interfaces, indicating that
they will not be taking part in the auto-negotiation process.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20221026074532.109220-4-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/ti/phy-gmii-sel.c