drm/i915/dg1: Update DMC_DEBUG register
authorAnshuman Gupta <anshuman.gupta@intel.com>
Wed, 14 Oct 2020 19:19:36 +0000 (12:19 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Thu, 15 Oct 2020 22:30:22 +0000 (15:30 -0700)
commit5bcc95ca382e764585e36e83e663b99298e00406
tree27e89db54247e158b14c5dd19af04597d3fe3329
parentcbb6ea8c6841f172efcf794bc5b2c70cb3c3f249
drm/i915/dg1: Update DMC_DEBUG register

Update the DMC_DEBUG_DC5 register to its new location and do not try
reading the DC6 counter since DG1 doesn't support DC6.

v2: Use IS_DGFX() instead of IS_DG1(). Even if not having DC6 is not
directly related to DGFX, the register move to a new location is. So in
future, if there is one supporting DC6, it would just need to add the
other register rather than fixing the case of a wrong register being
read (Matt)

Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201014191937.1266226-10-lucas.demarchi@intel.com
drivers/gpu/drm/i915/display/intel_display_debugfs.c
drivers/gpu/drm/i915/i915_reg.h