drm/i915: Introduce bit definitions of CTXT_SR_CTRL register.
authorZhi Wang <zhi.a.wang@intel.com>
Tue, 10 Feb 2015 09:11:36 +0000 (17:11 +0800)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 13 Feb 2015 22:28:22 +0000 (23:28 +0100)
commit5baa22c59f4e841eb45f8d1299043fb58370e48b
tree8ea40a192414ce1ef8d98829db9087c37c11586d
parent25bab385a0f8e76a32a5550d696f6a17540041c5
drm/i915: Introduce bit definitions of CTXT_SR_CTRL register.

This patch introduces 2 bit definitions of context save/restore
control register.

Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Suggested-by: Dave Gordon <david.s.gordon@intel.com>
Cc: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_lrc.c
drivers/gpu/drm/i915/intel_lrc.h