[Mips] Add intrinsics for 4-byte and 8-byte MSA loads/stores.
authorMirko Brkusanin <Mirko.Brkusanin@rt-rk.com>
Tue, 11 Feb 2020 10:35:23 +0000 (11:35 +0100)
committerMirko Brkusanin <Mirko.Brkusanin@rt-rk.com>
Tue, 11 Feb 2020 10:47:30 +0000 (11:47 +0100)
commit5ba931a84a3466aebab5d6dde3525e7a27c40c28
treea0b6c6afd20a7c91bc397ab36a54432b2c8d767d
parentcb0c4ee3ebfe55809c9d0be72726b05668028fc4
[Mips] Add intrinsics for 4-byte and 8-byte MSA loads/stores.

New intrinisics are implemented for when we need to port SIMD code from other
arhitectures and only load or store portions of MSA registers.

Following intriniscs are added which only load/store element 0 of a vector:
v4i32 __builtin_msa_ldrq_w (const void *, imm_n2048_2044);
v2i64 __builtin_msa_ldr_d (const void *, imm_n4096_4088);
void __builtin_msa_strq_w (v4i32, void *, imm_n2048_2044);
void __builtin_msa_str_d (v2i64, void *, imm_n4096_4088);

Differential Revision: https://reviews.llvm.org/D73644
clang/include/clang/Basic/BuiltinsMips.def
clang/lib/Headers/msa.h
clang/lib/Sema/SemaChecking.cpp
llvm/include/llvm/IR/IntrinsicsMips.td
llvm/lib/Target/Mips/MipsISelLowering.cpp
llvm/lib/Target/Mips/MipsISelLowering.h
llvm/lib/Target/Mips/MipsMSAInstrInfo.td
llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
llvm/test/CodeGen/Mips/msa/ldr_str.ll [new file with mode: 0644]