[ARM,MVE] Use VMOV.{S8,S16} for sign-extended extractelement.
authorSimon Tatham <simon.tatham@arm.com>
Tue, 12 Nov 2019 14:48:22 +0000 (14:48 +0000)
committerSimon Tatham <simon.tatham@arm.com>
Wed, 13 Nov 2019 09:08:41 +0000 (09:08 +0000)
commit5b9e4daef06dcfefc786737a32c8bbb5bd0fc5c4
tree93a5a7bc956f593c278866c57bad2a61661d476c
parent1d55c9e59ebf3f3ff572d42da433b2f72f1ce900
[ARM,MVE] Use VMOV.{S8,S16} for sign-extended extractelement.

MVE includes instructions that extract an 8- or 16-bit lane from a
vector and sign-extend it into the output 32-bit GPR. `ARMInstrMVE.td`
already included isel patterns to select those instructions in
response to the `ARMISD::VGETLANEs` selection-DAG node type. But
`ARMISD::VGETLANEs` was never actually generated, because the code
that creates it was conditioned on NEON only.

It's an easy fix to enable the same code for integer MVE, and now IR
that sign-extends the result of an extractelement (whether explicitly
or as part of the function call ABI) will use `vmov.s8` instead of
`vmov.u8` followed by `sxtb`.

Reviewers: SjoerdMeijer, dmgreen, ostannard

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70132
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/test/CodeGen/Thumb2/mve-extractelt.ll [new file with mode: 0644]