[SPARC64]: Sun4v interrupt handling.
authorDavid S. Miller <davem@sunset.davemloft.net>
Wed, 8 Feb 2006 10:53:50 +0000 (02:53 -0800)
committerDavid S. Miller <davem@sunset.davemloft.net>
Mon, 20 Mar 2006 09:12:01 +0000 (01:12 -0800)
commit5b0c0572fcd6204675c5f7ddfa572b5017f817dd
tree1075a61338e887bd6d4ecd4517646ef95dc09fbc
parentac29c11d4cd4fa1fac968e99998a956405732f2f
[SPARC64]: Sun4v interrupt handling.

Sun4v has 4 interrupt queues: cpu, device, resumable errors,
and non-resumable errors.  A set of head/tail offset pointers
help maintain a work queue in physical memory.  The entries
are 64-bytes in size.

Each queue is allocated then registered with the hypervisor
as we bring cpus up.

The two error queues each get a kernel side buffer that we
use to quickly empty the main interrupt queue before we
call up to C code to log the event and possibly take evasive
action.

Signed-off-by: David S. Miller <davem@davemloft.net>
arch/sparc64/kernel/head.S
arch/sparc64/kernel/irq.c
arch/sparc64/kernel/sun4v_ivec.S [new file with mode: 0644]
arch/sparc64/kernel/traps.c
arch/sparc64/kernel/ttable.S
include/asm-sparc64/cpudata.h