riscv: Introduce support for defining instructions
authorAndrew Jones <ajones@ventanamicro.com>
Sun, 2 Oct 2022 04:48:07 +0000 (10:18 +0530)
committerAnup Patel <anup@brainfault.org>
Sun, 2 Oct 2022 04:48:07 +0000 (10:18 +0530)
commit5ac43ab2e3fe4e5d48ef313a99d0591021c3bbdd
tree2f60be52b44fa92bd6ed4a4123a0043e461a2447
parent7fc4426959e17178654404e6bde4b920b5fee7c7
riscv: Introduce support for defining instructions

When compiling with toolchains that haven't yet been taught about
new instructions we need to encode them ourselves. Create a new file
where support for instruction definitions will evolve. We initiate
the file with a macro called INSN_R(), which implements the R-type
instruction encoding. INSN_R() will use the assembler's .insn
directive when available, which should give the assembler a chance
to do some validation. When .insn is not available we fall back to
manual encoding.

Not only should using instruction encoding macros improve readability
and maintainability of code over the alternative of inserting
instructions directly (e.g. '.word 0xc0de'), but we should also gain
potential for more optimized code after compilation because the
compiler will have control over the input and output registers used.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/Kconfig
arch/riscv/include/asm/insn-def.h [new file with mode: 0644]