drm/i915: add RPS configuration for Haswell
authorEugeni Dodonov <eugeni.dodonov@intel.com>
Mon, 2 Jul 2012 14:51:05 +0000 (11:51 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 5 Jul 2012 07:55:16 +0000 (09:55 +0200)
commit5a7dc92a0b55ccaa6e342ec212657d6fc806e790
tree68c51f54e558868d9d60ce9e80207193752d69bf
parente7911c48a05bc0002616a51e99761dec36110b04
drm/i915: add RPS configuration for Haswell

Most of the RPS and RC6 enabling functionality is similar to what we had
on Gen6/Gen7, so we preserve most of the registers.

Note that Haswell only has RC6, so account for that as well. As suggested
by Daniel Vetter, to reduce the amount of changes in the patch, we still
write the RC6p/RC6pp thresholds, but those are ignored on Haswell.

Note: Some discussion about the nature of the new tuning constants
popped up in review - the answer is that we don't know why they've
changed, but the guide from VPG with the magic numbers simply has
different values now.

v2: Squash fix for ?: vs | operation precende bug into this patch.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Added note to commit message. Squashed fix.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_pm.c