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(parent: 8a0e210) | patch
drm/amd/display: Assign correct left shift
authorChris Park <Chris.Park@amd.com>
Wed, 5 Aug 2020 20:59:28 +0000 (16:59 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 17 Aug 2020 18:07:19 +0000 (14:07 -0400)
commit5a7c86e168b4b3229945f792ba0ea04c5236521f
treef5ccaeebe2070e01b9a065e25a4aef9ac62cc2d8tree | snapshot
parent8a0e210c048e97f950c674840e281e378de08373commit | diff
drm/amd/display: Assign correct left shift

[Why]
Reading for DP alt registers return incorrect values due to LE_SF
definition missing.

[How]
Define correct LE_SF or DP alt registers.

Signed-off-by: Chris Park <Chris.Park@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h diff | blob | history
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.h diff | blob | history
Domain: System / Kernel;