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(parent: f3e002c) | patch
arm64: tlbflush: avoid flushing when fullmm == 1
authorWill Deacon <will.deacon@arm.com>
Tue, 6 Oct 2015 17:46:26 +0000 (18:46 +0100)
committerCatalin Marinas <catalin.marinas@arm.com>
Wed, 7 Oct 2015 10:56:21 +0000 (11:56 +0100)
commit5a7862e83000ccfd36db927c6f060458fe271157
tree418e7e0fb2163f8fdc15026832cab1f65a7017eetree | snapshot
parentf3e002c24e1f3b66f6e392ecd6928b5d04672c54commit | diff
arm64: tlbflush: avoid flushing when fullmm == 1

The TLB gather code sets fullmm=1 when tearing down the entire address
space for an mm_struct on exit or execve. Given that the ASID allocator
will never re-allocate a dirty ASID, this flushing is not needed and can
simply be avoided in the flushing code.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/include/asm/tlb.h diff | blob | history
Domain: System / Kernel;