GlobalISel: Verify atomic load/store ordering restriction
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Sun, 10 Apr 2022 14:47:12 +0000 (10:47 -0400)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 12 Apr 2022 00:12:22 +0000 (20:12 -0400)
commit5a5034d5081be4419ed464cc15d3af62426c0247
tree1d7e2d5ef747b10472c0f212d14e39b711a0a959
parent7e8ff962b315a2462e6b9e2804a6bfade887b310
GlobalISel: Verify atomic load/store ordering restriction

Reject acquire stores and release loads. This matches the restriction
imposed by the LLParser and IR verifier.
llvm/lib/CodeGen/MachineVerifier.cpp
llvm/test/CodeGen/MIR/AArch64/atomic-memoperands.mir
llvm/test/MachineVerifier/test_g_load.mir
llvm/test/MachineVerifier/test_g_store.mir