[IR] allow fast-math-flags on select of FP values
authorSanjay Patel <spatel@rotateright.com>
Wed, 22 May 2019 15:50:46 +0000 (15:50 +0000)
committerSanjay Patel <spatel@rotateright.com>
Wed, 22 May 2019 15:50:46 +0000 (15:50 +0000)
commit5a4f7cf2ff3fc15d82ca062ee64dd8bd01a68883
tree6fb5af1a3e04d75d44d0a65c713d4042cf37a445
parent63305c8fbba7b3b852f43fb2e05b9752097f13ba
[IR] allow fast-math-flags on select of FP values

This is a minimal start to correcting a problem most directly discussed in PR38086:
https://bugs.llvm.org/show_bug.cgi?id=38086

We have been hacking around a limitation for FP select patterns by using the
fast-math-flags on the condition of the select rather than the select itself.
This patch just allows FMF to appear with the 'select' opcode. No changes are
needed to "FPMathOperator" because it already includes select-of-FP because
that definition is based on the (return) value type.

Once we have this ability, we can start correcting and adding IR transforms
to use the FMF on a 'select' instruction. The instcombine and vectorizer test
diffs only show that the IRBuilder change is behaving as expected by applying
an FMF guard value to 'select'.

For reference:
rL241901 - allowed FMF with fcmp
rL255555 - allowed FMF with FP calls

Differential Revision: https://reviews.llvm.org/D61917

llvm-svn: 361401
llvm/docs/LangRef.rst
llvm/include/llvm/IR/IRBuilder.h
llvm/lib/AsmParser/LLParser.cpp
llvm/lib/Bitcode/Reader/BitcodeReader.cpp
llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
llvm/test/Bitcode/compatibility.ll
llvm/test/CodeGen/Generic/expand-experimental-reductions.ll
llvm/test/Transforms/InstCombine/fast-math.ll
llvm/test/Transforms/InstCombine/pow-sqrt.ll
llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll
llvm/test/Transforms/LoopVectorize/minmax_reduction.ll