drm/i915/icl: Program HS_TX_TIMEOUT/LP_RX_TIMEOUT/TA_TIMEOUT registers
authorMadhav Chauhan <madhav.chauhan@intel.com>
Tue, 30 Oct 2018 11:56:22 +0000 (13:56 +0200)
committerJani Nikula <jani.nikula@intel.com>
Wed, 31 Oct 2018 11:17:30 +0000 (13:17 +0200)
commit5a4712f472bf67dc81b4d7cc571edca11cf52c87
tree20e66af7b4faad82534e09d63dbe86ac5a7a0983
parent8bffd204ded8dd52091afe6455104166c0edfed7
drm/i915/icl: Program HS_TX_TIMEOUT/LP_RX_TIMEOUT/TA_TIMEOUT registers

Program the timeout values (in escape clock) for HS TX, LP RX and TA
timeout.

HX TX: Ensure that host does not continuously transmit in the HS
state. If this timer expires, then host will gracefully end its HS
transmission and allow the link to enter into LP state.

LP RX: Monitor the length of LP receptions from Peripheral. If timeout
happens then host will drive the stop state onto all data lanes (only
Data Lane 0 should be receiving anything from the Peripheral). This
effectively takes back ownership of the bus transmit in the HS state.

TA timeout: Timeout valuefor monitoring Bus Turn-Around (BTA) sequence.
BTA sequence should complete within a bounded amount of time, with
peripheral acknowledging BTA by driving the stop state.

v2 by Jani:
 - Rebase
 - Use intel_dsi_bitrate() and intel_dsi_tlpx_ns(intel_dsi)
 - Squash HX TX, LP RX and TA timeout into one patch
 - Fix bspec mode set sequence reference
 - Add FIXME about two timeouts

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/60e610ccffe5f8c09dee1c65828f28f25227efce.1540900289.git.jani.nikula@intel.com
drivers/gpu/drm/i915/icl_dsi.c
drivers/gpu/drm/i915/intel_dsi.h
drivers/gpu/drm/i915/intel_dsi_vbt.c